EMC Macro-Model with I/O (LECCS-I/O) for Multi-Bit Drives
نویسندگان
چکیده
A LECCS-I/O model of a multi-bit drive IC was devised for reducing electromagnetic interference. An equivalent power circuit model of the IC (74LVC04) was derived from measured power impedances by measuring four test boards. Each board consisted of a single layer, a powerimpedance measurement port, and two output ports from the six IC drivers. The power impedance was measured for various combinations of loading capacitances and ratios of high-impedance drivers to low-impedance drivers. The ratio of high-capacitance to low-capacitance drivers ranged from 0:6 to 6:0, and the loading capacitance varied from 1.5 pF/bit (open state) to 37 pF/bit. The power impedance of the IC can be easily modeled as that of an equivalent linear (resistance, inductance, and capacitance) circuit that combines high-impedance and low-impedance circuits. The multi-bit drive LECCS-I/O model could estimate the power impedance under high and low driver loading impedances to within an average error of 1.1 dB up to 500 MHz.
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